New York Put $25 Million on the Table for a Chip Design Center — and Drew a Nine-County Line Around Who Can Win It

For four years, New York's semiconductor story has been a story about dirt. Micron in Clay. NY CREATES in Albany. The National Semiconductor Technology Center's EUV facility north of the Thruway. Every headline has been about fabs, cleanrooms, and the $124 billion in private commitments the state says it has attracted to upstate manufacturing since 2022.

On September 10, 2026, Governor Kathy Hochul announced something structurally different: a competitive Request for Applications offering up to $25 million in capital grant funding to establish a semiconductor design center — and she put a hard geographic fence around it that makes every upstate institution ineligible.

The facility must be located in New York City, on Long Island (Nassau or Suffolk), or in one of five Hudson Valley counties: Westchester, Rockland, Orange, Dutchess, and Putnam. That is the entire eligible map. Phase 1 concept papers are due October 26, 2026, by 2:00 p.m.

This is not a fab subsidy dressed in different clothes. It is a deliberate attempt to buy the state a position in the part of the semiconductor value chain that does not require a billion-dollar cleanroom — and the eligibility rules tell you exactly what kind of applicant Empire State Development expects to hand the money to.

What the money is actually for

Chip design is the front end of the industry: the digital blueprints, the verification, the IP blocks, the tapeout. It is capital-light relative to fabrication and talent-heavy in exactly the way downstate New York is talent-heavy. The state's framing is that global semiconductor revenue is approaching $1 trillion by the end of 2026, and that private-sector chip design commitments are expected to run $500 billion over the next decade. New York has captured an enormous share of the manufacturing side of that and close to none of the design side.

The center's stated mission has three legs:

1. Incubate startup chip-design firms — bench space, EDA tool access, mentorship
2. Train the next generation of chip designers — a workforce pipeline, not just a facility
3. Connect emerging companies to New York's broader semiconductor ecosystem — which is to say, route downstate design work toward upstate fabrication

That third leg is the political logic of the whole program. Albany does not want a design center that ships its tapeouts to Taiwan. It wants a design center whose graduates and portfolio companies eventually put silicon through New York CREATES and, eventually, Micron.

Write to that. A concept paper that describes a world-class design incubator without describing the upstate handoff has missed the sentence in the announcement that the whole program is built around.

The eligibility rule that decides the field

Eligible applicants are non-profit organizations, academic or research institutions, and multi-entity consortia led by an eligible non-profit fiscal agent.

Read that carefully, because it is the most consequential line in the solicitation. A for-profit semiconductor company — a design services firm, an EDA vendor, a fabless startup, a venture studio — cannot be the prime applicant. It can be a consortium member. It can contribute equipment, tools, staff time, and letters of commitment. It cannot hold the award.

This is a common structure in state capital grantmaking, and it has a specific consequence: the applicants best positioned to win are universities and non-profit research institutions in the nine eligible counties, and the winning application is likely to be a consortium in which the non-profit is the fiscal agent and the industry partners supply the substance.

The downstate institutions that fit the geographic and organizational profile are not hard to enumerate: Columbia, NYU, CUNY (City College and the Advanced Science Research Center), Cornell Tech on Roosevelt Island, Stony Brook and its existing semiconductor research investments on Long Island, Brookhaven National Laboratory's affiliated non-profits, Rensselaer's downstate operations, and the non-profit economic development corporations that serve Westchester and the mid-Hudson.

If you are one of those institutions, you are almost certainly already drafting. If you are an industry player, your move is not to apply — it is to decide which prime you are backing, and to back exactly one of them, because a letter of commitment that appears in three competing concept papers is worth less than no letter at all.

Capital grant means capital

The phrase "capital grant funding" is doing work. Capital grants in New York State economic development programs typically reimburse hard costs: acquisition, construction, renovation, and equipment with a useful life measured in years. They do not typically fund salaries, programming, curriculum development, or operating losses.

A design center, however, is mostly a tool-license and payroll problem. EDA licenses from Cadence, Synopsys, and Siemens are the single largest recurring cost in any chip design environment, and they are operating expenses. Multi-project wafer shuttle runs are operating expenses. Instructor salaries are operating expenses.

This is the central strategic tension in the application, and every serious competitor will have to resolve it the same way: the $25 million buys the building and the iron, and the consortium brings a credible, documented plan for the operating money. An application that treats the state award as the whole business model will not survive review. An application that shows $25 million in state capital matched against named, committed, multi-year operating support from industry partners, philanthropy, and institutional funds is a fundable application.

If you do nothing else before October 26, get your operating-cost commitments in writing.

The Phase 1 concept paper is a screen, not an application

Empire State Development is running this in phases. The October 26 deadline is for Phase 1 concept papers — a short document, submitted by a hard clock at 2:00 p.m., that determines who is invited to submit a full application.

Two-phase state solicitations tend to screen on a narrow set of things, and concept papers fail for predictable reasons:

• Geographic ineligibility. The site is not in one of the nine counties, or the applicant cannot yet name a site. Name the site. Site control — ownership, a lease, an option, or a letter from the property owner — is the fastest way to look real in a capital program.
• The wrong prime. A for-profit signs as applicant with a non-profit listed as a "partner." This is a disqualification, not a curable defect.
• No demonstrated design capability. A concept paper that promises to hire chip designers, rather than naming the faculty, staff, and industry partners who already do this work, reads as aspirational.
• Vague ecosystem linkage. No articulated pathway from the downstate center to upstate fabrication and to the state's existing semiconductor assets.
• Missing the 2:00 p.m. clock. State portals are not federal portals. A 2:00 p.m. deadline is not a 11:59 p.m. deadline, and there is no Grants.gov-style grace.

For a concept paper this short with a window this tight, the differentiator is almost never the prose. It is whether you can show — in two or three pages — that the building exists or can exist, that the people exist, and that industry has already signed something.

Why this program exists now, and what it signals

New York's semiconductor strategy has been running an imbalance. The state has committed enormous public resources to fabrication and advanced packaging while the design layer — the layer with the highest margins, the lowest capital intensity, and the strongest tie to the state's existing computer-science and electrical-engineering talent base — has gravitated to California, Texas, and increasingly to India and Israel.

Hochul's January 2026 State of the State pitched chip design and quantum hubs as the next phase of the state's technology economy, and this RFA is the first competitive dollar behind the chip-design half of that pitch. It is also a signal to other states: the fab-subsidy era of semiconductor economic development is expensive, saturated, and federally entangled, while the design layer is comparatively cheap to seed and much harder for a competitor state to poach once the talent cluster forms.

For grant seekers, the broader lesson is about where state capital is moving. The federal semiconductor apparatus is in flux — the CHIPS Act's incentive awards have been renegotiated, the NIST CHIPS R&D BAA paused submissions this month, and federal grant rules themselves are frozen pending the OMB rewrite. State capital programs with clean eligibility rules, short timelines, and no federal Uniform Guidance overhang are, for the moment, the more predictable money.

What to do between now and October 26

If you are an eligible non-profit or academic institution in the nine counties:

1. Lock site control this week. A named address with documented control beats a described concept.
2. Convert industry interest into exclusive letters. One prime per industry partner. Ask for exclusivity explicitly.
3. Separate capital from operating in your own budget before ESD asks you to. Show the $25 million against hard costs and show a funded operating plan beside it.
4. Name the upstate linkage concretely. Which fabrication partner, which shuttle program, which pathway from design to tapeout to New York silicon.
5. Build the workforce leg as a measurable program, not a mission statement. Cohort sizes, partner institutions, placement targets.

If you are a for-profit chip firm: pick your prime, sign one letter, and negotiate your role in the operating plan now rather than after the award.

If you are outside the nine counties: this one is closed to you, and the honest advice is to stop reading and look at the state's upstate semiconductor programs instead. Geographic eligibility in state capital programs is never waived.

The RFA materials are available through Empire State Development. Six weeks is a short runway for a consortium application with a site-control requirement — the teams that win these things generally started before the announcement, and the teams that place second generally started the week it was announced.