Real-Time Machine Learning (RTML)

Real-Time Machine Learning (RTML) is sponsored by National Science Foundation (NSF). Supports research in real-time machine learning systems, including applications in wireless networking.

NSF 19-566: Real-Time Machine Learning (RTML) | NSF - U.S. National Science Foundation Archived funding opportunity This solicitation is archived. Important information for proposers and award recipients All proposals must be submitted in accordance with the requirements specified in the funding opportunity and in the Proposal & Award Policies & Procedures Guide (PAPPG) and its supplements .

All NSF grants and cooperative agreements are subject to the applicable set of NSF award terms and conditions . NSF has updated its research security policies for NSF funded projects. NSF 19-566: Real-Time Machine Learning (RTML) Download the solicitation (PDF, 0.

7mb) National Science Foundation Directorate for Computer and Information Science and Engineering Division of Computing and Communication Foundations Directorate for Engineering Division of Electrical, Communications and Cyber Systems Full Proposal Deadline(s) (due by 5 p. m.

submitter's local time): Important Information And Revision Notes Any proposal submitted in response to this solicitation should be submitted in accordance with the revised ; NSF Proposal & Award Policies & Procedures Guide (PAPPG) ( NSF 19-1 ), which is effective for proposals submitted, or due, on or after February 25, 2019.

Summary Of Program Requirements Real-Time Machine Learning (RTML) A grand challenge in computing is the creation of machines that can proactively interpret and learn from data in real time, solve unfamiliar problems using what they have learned, and operate with the energy efficiency of the human brain.

While complex machine-learning algorithms and advanced electronic hardware (henceforth referred to as 'hardware') that can support large-scale learning have been realized in recent years and support applications such as speech recognition and computer vision, emerging computing challenges require real-time learning, prediction, and automated decision-making in diverse domains such as autonomous vehicles, military applications, healthcare informatics and business analytics.

A salient feature of these emerging domains is the large and continuously streaming data sets that these applications generate, which must be processed efficiently enough to support real-time learning and decision making based on these data. This challenge requires novel hardware techniques and machine-learning architectures.

This solicitation seeks to lay the foundation for next-generation co-design of RTML algorithms and hardware, with the principal focus on developing novel hardware architectures and learning algorithms in which all stages of training (including incremental training, hyperparameter estimation, and deployment) can be performed in real time.

The National Science Foundation (NSF) and the Defense Advanced Research Projects Agency (DARPA) are teaming up through this Real-Time Machine Learning (RTML) program to explore high-performance, energy-efficient hardware and machine-learning architectures that can learn from a continuous stream of new data in real time, through opportunities for post-award collaboration between researchers supported by DARPA and NSF.

Cognizant Program Officer(s): Please note that the following information is current at the time of publishing. See program website for any updates to the points of contact. Sankar Basu, telephone: (703) 292-7843, email: sabasu@nsf.

gov Jenshan Lin, telephone: (703) 292-7950, email: jenlin@nsf. gov Applicable Catalog of Federal Domestic Assistance (CFDA) Number(s): 47. 070 --- Computer and Information Science and Engineering Anticipated Type of Award: Continuing Grant Estimated Number of Awards: 8 to 12 Anticipated Funding Amount: $10,000,000 Award size: Small Awards: up to $500,000 for 3 years; Large Awards: up to $1,500,000 for 3 years.

Estimated program budget, number of awards and average award size/duration are subject to the availability of funds. Who May Submit Proposals: Proposals may only be submitted by the following: Institutions of Higher Education (IHEs) - Two- and four-year IHEs (including community colleges) accredited in, and having a campus located in the US, acting on behalf of their faculty members.

Special Instructions for International Branch Campuses of US IHEs: If the proposal includes funding to be provided to an international branch campus of a US institution of higher education (including through use of subawards and consultant arrangements), the proposer must explain the benefit(s) to the project of performance at the international branch campus, and justify why the project activities cannot be performed at the US campus.

There are no restrictions or limits. Limit on Number of Proposals per Organization: There are no restrictions or limits. Limit on Number of Proposals per PI or Co-PI: 2 An individual can participate as PI, co-PI, Senior Personnel, or Consultant on no more than two proposals submitted in response to this solicitation.

These eligibility constraints will be strictly enforced in order to ensure fair and consistent treatment for everyone. In the event that an individual exceeds the two-proposal limit for this solicitation the first two proposals received will be accepted and the remainder will be returned without review. No exceptions will be made.

Additionally, proposals submitted in response to this solicitation may not duplicate or be substantially similar to other proposals concurrently under consideration by DARPA. Duplicate or substantially similar proposals will be returned without review. Proposal Preparation and Submission Instructions A.

Proposal Preparation Instructions Letters of Intent: Not required Preliminary Proposal Submission: Not required Full Proposals submitted via FastLane: NSF Proposal and Award Policies and Procedures Guide (PAPPG) guidelines apply. The complete text of the PAPPG is available electronically on the NSF website at: https://www. nsf.

gov/publications/pub_summ. jsp? ods_key=pappg .

Full Proposals submitted via Grants. gov: NSF Grants. gov Application Guide: A Guide for the Preparation and Submission of NSF Applications via Grants.

gov guidelines apply (Note: The NSF Grants. gov Application Guide is available on the Grants. gov website and on the NSF website at: https://www.

nsf. gov/publications/pub_summ. jsp?

ods_key=grantsgovguide ). Cost Sharing Requirements: Inclusion of voluntary committed cost sharing is prohibited. Indirect Cost (F&A) Limitations: Other Budgetary Limitations: Other budgetary limitations apply.

Please see the full text of this solicitation for further information. Full Proposal Deadline(s) (due by 5 p. m.

submitter's local time): Proposal Review Information Criteria National Science Board approved criteria. Additional merit review considerations apply. Please see the full text of this solicitation for further information.

Award Administration Information Additional award conditions apply. Please see the full text of this solicitation for further information. Standard NSF reporting requirements apply.

A grand challenge in computing is the creation of machines that can proactively interpret and learn from data in real time, solve unfamiliar problems using what they have learned, and operate with the energy efficiency of the human brain.

The exponential increase in hardware performance, the development of complex machine-learning (ML) algorithms, and their realization using high-performance electronic hardware (referred henceforth as 'hardware') has facilitated learning from very large data sets in recent years.

While older problems of artificial intelligence (AI), such as speech recognition and language translation, have already made their way into everyday use (e.g., in smartphones), current and future computing challenges need to be addressed to achieve the possibility of real-time prediction and automated decision-making in diverse domains such as autonomous vehicles, military applications, healthcare informatics and business analytics.

A salient feature of these emerging domains is the large and continuously streaming data sets that these applications generate, which must be processed efficiently enough to support real-time learning and decision making based on these data. This challenge requires novel hardware techniques and machine-learning architectures.

NSF and DARPA are teaming up through this Real-Time Machine Learning (RTML) program to explore high-performance, energy-efficient hardware and ML architectures that can learn from a continuous stream of new data in real time.

The need to process large data sets arising in many practical problems require real-time learning from data streams makes high-performance hardware necessary, and yet the very nature of these problems, along with currently known algorithms for addressing them, imposes significant hardware challenges.

Current versions of deep-learning algorithms operate by using millions of parameters whose optimal values need to be determined for good performance in real time on high-performance hardware. Conversely, the availability of fast hardware implementations can enable fuller use of Bayesian techniques, attractive for their ability to quantify prediction uncertainty and thus give estimates of reliability and prediction breakdown.

The abilities of ML systems to self-assess for reliability and predict their own breakdowns (and also recover without significant ill effects) constitute critical areas for algorithm development as autonomous systems become widely deployed in both decision support and embodied AI agents.

Only with attention to these challenges can we construct systems that are robust when they encounter novel situations or degradation and failure of sensors. While ML algorithms need to account for the capabilities of hardware as well as real-time learning and inference constraints, hardware also needs to be re-designed from the ground-up to optimize ML architectures.

To address this dual challenge, NSF and DARPA are teaming up to explore advances in energy-efficient hardware and ML architectures that can learn from a continuous stream of new data in real time.

While this NSF program, called Real-Time Machine Learning (RTML), is distinct from the DARPA RTML program, the NSF program offers collaboration opportunities to awardees from DARPA (and DARPA offers similar opportunities to the NSF awardees) throughout the duration of their projects, as described in Section II. D.

As part of this program, various ML paradigms and architectures (including deep-learning) that can support real-time inference and rapid learning are of interest.

These include, but are not limited to: feed forward neural networks (including convolutional nets); recurrent networks and specialized versions (e.g., liquid-state machines); neuroscience-inspired architectures, such as spike time-dependent neural nets including their stochastic counterparts; non-neural ML architectures inspired by psychophysics and derived from classical statistical methods; classical supervised learning (e.g., regression and decision trees and related ensemble techniques); unsupervised learning (e.g., clustering and manifold learning) approaches; semi-supervised learning methods; adversarial learning; and improved transfer learning, reinforcement learning, and one-shot learning algorithms and architectures appropriate for hardware implementation.

Centralized learning from aggregated data over time in a cloud environment often does not lend itself to real-time inference and adaptation to new, unlabeled datasets. These situations are often found in distributed settings such as autonomous vehicles, arrays of sensors, and adversarial settings where resources for exporting the newly-encountered data might be scarce or unavailable.

In these cases, one can expect that data are being collected and processed by distributed arrays of sensors with some limited learning capabilities, though the communication among these sensors and to a centralized cloud could be highly constrained. Therefore, approaches to RTML in a distributed setting that can closely approximate ML performance in a centralized cloud setting are highly desired in this program. II.

B. Hardware Design and Realization : The race to improve and accelerate machine learning through hardware realizations has been largely driven by several emerging hardware technologies that require significant additional research, development, and evaluation activities.

Radical innovations spanning multiple layers of the design stack from device to circuit to architecture levels and involving both memory and switching elements are pertinent. At the circuit level, while the memristor has been reinvented as the fourth circuit element suitable for neural modeling, physical stochasticity inherent in some emerging devices can be used to realize spike-timing behavior of neurons.

The photonic and spintronic architectures are other promising examples and have been explored for architecting deep-learning machines. At a higher level of the stack, in- or near-memory processing, possibly in a three-dimensional integrated circuit architecture, provides an example of non-von Neumann computing relevant for solving challenging AI problems as well.

Several of the neuronal models of computation currently being explored are not purely digital but are also analog or mixed-signal. Several emerging technologies lend themselves more naturally to analog/mixed-signal realizations. Attempts to solve computationally hard, purely combinatorial problems by reformulating the discrete problem as a continuous-time analog dynamical system are also underway.

Such systems that are naturally realized in analog/mixed-signal hardware show much promise for faster run time and/or significantly less energy consumption for problems inspired by RTML. Each alternative hardware paradigm has its unique constraints that can be satisfied in multiple ways by exploiting flexibility in algorithm design, thus giving rise to possibilities of hardware-software-algorithm co-design.

This possibility is not just for hardware realizations using emerging technologies but can also be envisioned in conventional silicon CMOS platforms. For example, while the implementation of some deep-learning algorithms is practically infeasible within the limits of current CMOS technology, approximate versions of such algorithms are being explored as suitable for practical realization.

Such research could inspire new algorithmic innovations from a foundational or analytical perspective, or could alternatively be driven by purely empirical or practical considerations. Both foundational and operational innovations in hardware-software-algorithm co-design of RTML architectures are of interest to this program.

The overall expectation of this program is to lay the foundation for next-generation co-design of RTML algorithms and hardware.

Some program guidelines include: Learning algorithms in which all stages of training (including incremental training, hyperparameter estimation, and deployment) can be performed in real time will receive higher priority, recognizing the asymmetry in real-time learning versus real-time inference; Proposals submitted to this program should seek to demonstrate radical improvement in the metrics of performance, e.g., latency and energy efficiency, with minimal degradation in predictive performance, through hardware-software co-design; Hardware-software cross-layer co-design is required; Approximate algorithms for efficient implementation, e.g., low-precision gradient computation and sparsely-connected neuronal nodes, are within scope; Approaches to self-assessing systems are within scope; Distributed ML algorithms and hardware for real-time performance are within scope; Efficient and novel utilization of data and memory paths, e.g., in- or near-memory computations, are within scope; In addition to digital architecture, the program is also interested in analog/mixed-signal architectures; and Hardware technologies in silicon or other novel technologies, possibly on heterogeneous platforms, to the extent that is consistent with the goals of the DARPA RTML program, are encouraged.

Proposers should be aware that routine implementations of existing AI/ML algorithms in standard hardware are not within scope of this program. II. C.

Classes of Projects: Proposals for the following two classes of projects will be accepted. Each proposer is expected to explain in the Project Description how the project fits within the selected category in terms of its scope and goals. Small Projects: Small projects may be requested with total budgets of up to $500,000 for a period of up to three years.

They are intended to support exploration of emerging and innovative ideas with substantial potential for impact. Proposals for Small projects are required to clearly describe the design and realization of the proposed RTML approach.

The physical implementation is optional, but a roadmap of future development, e.g., in Field-Programmable Gate Arrays (FPGA), or in Application-Specific Integrated Circuits (ASIC) if pertinent, should be discussed. Small projects are not eligible for partnership supplements resulting from the DARPA collaboration (see details in Section II. D).

Large Projects: Large projects may be requested with total budgets up to $1,500,000 for a period of three years. They are intended to support multi-disciplinary efforts spanning ML, circuit, and hardware-software-algorithm co-design that accomplish clear goals requiring an integrated perspective spanning the disciplines.

Proposals for Large projects are required to cover the design of the proposed RTML approach and the physical implementation in FPGA or ASIC. Collaborative teaming demonstrating appropriate multi-disciplinary expertise is required for Large projects. Large projects are also eligible for requesting partnership supplements resulting from the DARPA collaboration (see details in Section II.

D). II. D Structure of DARPA Collaboration: The NSF-DARPA collaboration for this program seeks to enable cross-pollination of ideas that are being funded through the awards individually made by NSF and DARPA.

The DARPA program will select project teams from submissions to its Broad Agency Announcement, and will award Phase 1 (18 months) and Phase 2 (18 months, for a total of 36 months including Phase 1) teams. NSF will independently select projects for 36-month awards.

The DARPA Phase 1 objective is a RTML hardware silicon compiler, and the outcome will be made available by DARPA to the NSF awardees as an option to evaluate their proposed new RTML approaches.

In the meantime, new techniques and results produced by NSF awardees during the first 18 months will be made available to DARPA project teams for them to implement in their Phase 2 efforts to explore novel ML architectures and circuits that will enable RTML. There will be four joint NSF-DARPA workshops during the 36-month program: at the initial program kick-off, and then at the 9-month, 18-month, and 27-month marks.

Representatives of each NSF project are required to attend all four workshops to engage with DARPA project teams. These joint workshops are expected to promote knowledge-sharing and collaboration opportunities among the teams supported by both agencies.

In particular, the first three workshops at the program kick-off and then the 9-month and 18-month marks (and the time in between these engagements) are critical to the expected synergy in the second half of the program. Before starting Phase 2 work, DARPA performer teams are expected to synchronize expectations with the NSF RTML program to ensure that the latest techniques that are being produced by NSF awardees are being tried.

As an option, DARPA performer teams can propose inclusion of researchers working in the NSF RTML awards as part of their DARPA Phase 2 efforts. Any DARPA Phase 1 performers who do not qualify for Phase 2 support from DARPA can work with NSF awardees under this program to request supplemental funding from NSF through an existing NSF RTML Large award.

Each such " partnership supplement " will be requested via an NSF awardee near the 18-month mark from the start date of their NSF project.

The NSF RTML awardee will have to demonstrate that a collaboration with the DARPA performers will add value to the NSF project, to show alignment with and enhancing the goals of the NSF project, and to demonstrate sufficient intellectual merit in order to qualify for this supplemental funding to support the new project partner(s).

Anticipated Type of Award: Continuing Grant Estimated Number of Awards: 8 to 12 Anticipated Funding Amount: $10,000,000 Award size: Small Awards: up to $500,000 for 3 years; Large Awards: up to $1,500,000 for 3 years. Estimated program budget, number of awards and average award size/duration are subject to the availability of funds. IV.

Eligibility Information Who May Submit Proposals: Proposals may only be submitted by the following: Institutions of Higher Education (IHEs) - Two- and four-year IHEs (including community colleges) accredited in, and having a campus located in the US, acting on behalf of their faculty members.

Special Instructions for International Branch Campuses of US IHEs: If the proposal includes funding to be provided to an international branch campus of a US institution of higher education (including through use of subawards and consultant arrangements), the proposer must explain the benefit(s) to the project of performance at the international branch campus, and justify why the project activities cannot be performed at the US campus.

There are no restrictions or limits. Limit on Number of Proposals per Organization: There are no restrictions or limits. Limit on Number of Proposals per PI or Co-PI: 2 An individual can participate as PI, co-PI, Senior Personnel, or Consultant on no more than two proposals submitted in response to this solicitation.

These eligibility constraints will be strictly enforced in order to ensure fair and consistent treatment for everyone. In the event that an individual exceeds the two-proposal limit for this solicitation the first two proposals received will be accepted and the remainder will be returned without review. No exceptions will be made.

Additionally, proposals submitted in response to this solicitation may not duplicate or be substantially similar to other proposals concurrently under consideration by DARPA. Duplicate or substantially similar proposals will be returned without review. Additional Eligibility Info: Subawards are not permitted to overseas branch campuses/offices of US-based proposing organizations eligible to submit to this solicitation.

V. Proposal Preparation And Submission Instructions A. Proposal Preparation Instructions Full Proposal Preparation Instructions : Proposers may opt to submit proposals in response to this Program Solicitation via Grants.

gov or via the NSF FastLane system. Full proposals submitted via FastLane: Proposals submitted in response to this program solicitation should be prepared and submitted in accordance with the general guidelines contained in the NSF Proposal & Award Policies & Procedures Guide (PAPPG). The complete text of the PAPPG is available electronically on the NSF website at: https://www.

nsf. gov/publications/pub_summ. jsp?

ods_key=pappg . Paper copies of the PAPPG may be obtained from the NSF Publications Clearinghouse, telephone (703) 292-7827 or by e-mail from nsfpubs@nsf. gov .

Proposers are reminded to identify this program solicitation number in the program solicitation block on the NSF Cover Sheet For Proposal to the National Science Foundation. Compliance with this requirement is critical to determining the relevant proposal processing guidelines. Failure to submit this information may delay processing.

Full proposals submitted via Grants. gov: Proposals submitted in response to this program solicitation via Grants. gov should be prepared and submitted in accordance with the NSF Grants.

gov Application Guide: A Guide for the Preparation and Submission of NSF Applications via Grants. gov . The complete text of the NSF Grants.

gov Application Guide is available on the Grants. gov website and on the NSF website at: ( https://www. nsf.

gov/publications/pub_summ. jsp? ods_key=grantsgovguide ).

To obtain copies of the Application Guide and Application Forms Package, click on the Apply tab on the Grants. gov site, then click on the Apply Step 1: Download a Grant Application Package and Application Instructions link and enter the funding opportunity number, (the program solicitation number without the NSF prefix) and press the Download Package button. Paper copies of the Grants.

gov Application Guide also may be obtained from the NSF Publications Clearinghouse, telephone (703) 292-7827 or by e-mail from nsfpubs@nsf. gov . In determining which method to utilize in the electronic preparation and submission of the proposal, please note the following: Collaborative Proposals.

All collaborative proposals submitted as separate submissions from multiple organizations must be submitted via the NSF FastLane system. PAPPG Chapter II. D.

3 provides additional information on collaborative proposals. See PAPPG Chapter II. C.

2 for guidance on the required sections of a full research proposal submitted to NSF. Please note that the proposal preparation instructions provided in this program solicitation may deviate from the PAPPG instructions. The following information SUPPLEMENTS (note that it does NOT replace) the guidelines provided in the NSF Proposal & Award Policies & Procedures Guide (PAPPG).

Proposal titles should take the form RTML followed by a colon, then the project class followed by a colon, then "Collaborative" followed by a colon (if a collaborative proposal), and then the title. For example, the title of each proposal of a collaborative set of proposals for a Large project would be RTML: Large: Collaborative: Title .

Proposals from PIs in institutions that have RUI (Research in Undergraduate Institutions) eligibility should also include "RUI" followed by a colon immediately before the project title, for example, RTML: Small: RUI: Title . Similarly, GOALI (Grant Opportunities for Academic Liaison with Industry) proposals should include "GOALI" followed by a colon as the last identifier before the project title.

The Project Summary consists of an overview, a statement on the intellectual merit of the proposed activity, a statement on the broader impacts of the proposed activity, and a set of keywords. Please provide between 2 and 6 keywords at the end of the overview in the Project Summary. This information will be used in implementing the merit review process.

The keywords should describe the main scientific/engineering areas explored in the proposal. Keywords should be prefaced with "Keywords" followed by a colon and keywords should be separated by semi-colons. Length of Project Description - Describe the research and education activities to be undertaken in up to 15 pages for Small Projects, and in up to 20 pages for Large Projects.

Proposals that exceed these limits will be returned without review. All proposals are strongly encouraged to include meaningful plans to broaden and increase participation by underrepresented groups in computer science and engineering.

These plans should be described within the Broader Impacts sections of the Project Description, should be clearly identifiable within the Project Description text, and should represent a clear, actionable effort with an evaluation plan. If a PI plans to become a part of an institutional broadening participation effort, then the PI must report on her/his specific contribution within that effort.

An intervention that appeals to "all students" can be considered a broadening participation effort if the content is relevant to specific, identified underrepresented groups within the student body. The Project Description must include the following subsections specifically labeled as below. Proposals that fail to include one or more of these sections will be returned without review (RWR), without exception.

Research Description : This is the intellectual heart of the Project Description and must also include "Intellectual Merit" as a subsection , as required in the PAPPG. The Research Description section must describe the technical rationale and technical approach of the RTML research. It should describe the challenges that drive the research problem.

It must identify how the research integrates ML and hardware components. This section should also explain how the project research fits the Program Description for the class of proposal — Small or Large—as described in Section II. B.

Classes of Projects. Specific activities for performing the research should be described as well. The section should additionally provide the project research plan including descriptions of major tasks, the primary organization responsible for each task, and milestones.

The research description must include a Gantt chart which lays out the sequence of major activities and their inter-dependencies. Evaluation/Experimentation Plan : This section should describe how the research concepts proposed will be demonstrated and validated.

It should present metrics for success, and identify design choices, critical experiments, and describe how the research will be demonstrated, including through simulation, prototyping, and testing using synthetic or real-life datasets. For Large projects, the validation plan must include the physical implementation in FPGA or ASIC.

Broader Impacts : In addition to the specific information required in the PAPPG, this section should provide plans for disseminating the research outcomes (including the design and any reference implementation) and for integrating research outcomes into education. Information about broadening participation, as described above, should also be given here.

Project Management and Collaboration Plan [For Large Projects Only]: This section should summarize how the project team is appropriate to realize the project goals and how the team will assure effective collaboration. It should provide a compelling rationale for any multi-institution structure of the project, if appropriate.

The plan should identify organizational responsibilities and how the project will be managed, including approaches for meeting project goals.

It should also include: 1) the specific roles of the project participants in all involved organizations; 2) information on how the project will be managed across all the investigators, institutions, and/or disciplines; 3) approaches for integration of research components throughout the project; and 4) identification of the specific coordination mechanisms that will enable cross-investigator, cross-institution, and/or cross-discipline scientific integration.

In the Supplementary Documents Section, upload the following: (1) A list of Project Personnel and Partner Institutions (Note: In collaborative proposals, the lead institution should provide this information for all participants): Provide current, accurate information for all personnel and institutions involved in the project. NSF staff will use this information in the merit review process to manage reviewer selection.

The list should include all PIs, co-PIs, Senior Personnel, paid/unpaid Consultants or Collaborators, Subawardees, Postdocs, and project-level advisory committee members. This list should be numbered and include (in this order) Full name, Organization(s), and Role in the project, with each item separated by a semi-colon. Each person listed should start a new numbered line.

For example: Mary Smith; XYZ University; PI John Jones; University of PQR; Senior Personnel Jane Brown; XYZ University; Postdoc Bob Adams; ABC Community College; Paid Consultant Susan White; DEF Corporation; Unpaid Collaborator Tim Green; ZZZ University; Subawardee (2) Data Management Plan (required): Proposals must include a Supplementary Document of no more than two pages labeled "Data Management Plan."

This Supplementary Document should describe how the proposal will conform to NSF policy on the dissemination and sharing of research results. See Chapter II. C.

2. j of the PAPPG for full policy implementation. For additional information on the Dissemination and Sharing of Research Results, see: https://www.

nsf. gov/bfa/dias/policy/dmp. jsp .

For specific guidance for Data Management Plans submitted to the Directorate for Computer and Information Science and Engineering (CISE) see: https://www. nsf. gov/cise/cise_dmp.

jsp . Collaborators and Other Affiliations Information : Proposers should follow the guidance specified in Chapter II. C.

1. e of the NSF PAPPG. Note the distinction to item (1) under Supplementary Documents above: the listing of all project participants is collected by the project lead and entered as a Supplementary Document, which is then automatically included with all proposals in a project.

The Collaborators and Other Affiliations are entered for each participant within each proposal and, as Single Copy Documents, are available only to NSF staff. In an effort to assist proposal preparation, the following checklists are provided as a reminder of the items that should be checked before submitting a proposal to this solicitation. These are a summary of the requirements described above.

For the items marked with (RWR), the proposal will be returned without review if the required item is non-compliant at the submission deadline. The last line of the Project Summary should consist of the word "Keywords" followed by a colon and between 2-6 keywords, separated by semi-colons. (RWR) Project Description not to exceed 15 pages for Small Projects, and not to exceed 20 pages for Large Projects.

(RWR) A section labeled "Research Description" is required within the Project Description. (RWR) A section labeled "Evaluation/Experimentation Plan" is required within the Project Description. (RWR) A section labeled "Broader Impacts" is required within the Project Description.

(RWR) For Large Projects, a section labeled "Project Management and Collaboration Plan" is required within the Project Description. A subsection labeled "Intellectual Merit" is required in the "Research Description" section of the Project Description. Project Personnel and Partner Institutions list as a Supplementary Document must be included.

Proposals that do not comply with the requirements marked as RWR will be returned without review. Inclusion of voluntary committed cost sharing is prohibited. Other Budgetary Limitations: Small Awards up to $500,000 and Large Awards up to $1,500,000.

Budget Preparation Instructions: Proposals should budget for up to two project personnel to attend four joint NSF-DARPA workshops over the duration of the project, likely to be held in the Washington DC area. Full Proposal Deadline(s) (due by 5 p. m.

submitter's local time): D. FastLane/Grants. gov Requirements For Proposals Submitted Via FastLane: To